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SP3243E 3 Driver/5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers
FEATURES
Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply Interoperable with EIA/TIA-232 and adheres to EIA/TIA-562 down to a +2.7V power source AUTO ON-LINE(R) circuitry automatically wakes up from a 1A shutdown Regulated Charge Pump Yields Stable RS-232 Outputs Regardless of VCC Variations Enhanced ESD Specifications: +15kV Human Body Model +15kV IEC1000-4-2 Air Discharge +8kV IEC1000-4-2 Contact Discharge 250 Kbps min. transmission rate (EB) 1000 Kbps min. transmission rate (EU) Ideal for High Speed RS-232 Applications
C2+ 1 C2- 2 VR1IN R2IN R3IN R4IN 3 4 5 6 7 SP3243E 28 C1+ 27 26 25 24 V+ VCC GND C1-
23 ONLINE 22 SHUTDOWN 21 STATUS 20 19 18 17 16 15 R2OUT R1OUT R2OUT R3OUT R4OUT R5OUT
R5IN 8 T1OUT 9 T2OUT 10 T3OUT 11 T3IN 12 T2IN 13 T1IN 14
Now Available in Lead Free Packaging
The SP3243E products are 3 driver/5 receiver RS-232 transceiver solutions intended for portable or hand-held applications such as notebook and palmtop computers. The SP3243E includes one complementary receiver that remains alert to monitor an external device's Ring Indicate signal while the device is shutdown. The SP3243E and EB devices feature slew-rate limited outputs for reduced crosstalk and EMI. The "U" and "H" series are optimized for high speed with data rates up to 1Mbps, easily meeting the demands of high speed RS-232 applications. The SP3243E series uses an internal high-efficiency, charge-pump power supply that requires only 0.1F capacitors in 3.3V operation. This charge pump and Exar's driver architecture allow the SP3243E series to deliver compliant RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The AUTO ON-LINE(R) feature allows the device to automatically "wake-up" during a shutdown state when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device automatically shuts itself down drawing less than 1A.
Device Power Supplies +3.0V to +5.5V +3.0V to +5.5V +3.0V to +5.5V +3.0V to +5.5V RS-232 Drivers 3 3 3 3 RS-232 Receivers 5 5 5 5 External Components 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors Auto On-Line Circuitry Yes Yes Yes Yes TTL 3State Yes Yes Yes Yes
DESCRIPTION
SELECTION TABLE
# of Pins 28 28 28 28 Data Rate 120 250 460 1000 ESD Rating 15kV 15kV 15kV 15kV
SP3243E SP3243EB SP3243EH SP3243EU
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC.......................................................-0.3V to +6.0V V+ (NOTE 1).......................................-0.3V to +7.0V V- (NOTE 1)........................................+0.3V to -7.0V V+ + |V-| (NOTE 1)...........................................+13V ICC (DC VCC or GND current).........................+100mA Input Voltages TxIN, ONLINE,SHUTDOWN, .....-0.3V to Vcc +6.0V RxIN...................................................................+15V Output Voltages TxOUT.............................................................+13.2V RxOUT, STATUS.......................-0.3V to (VCC +0.3V) Short-Circuit Duration TxOUT....................................................Continuous Storage Temperature......................-65C to +150C NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. Power Dissipation per package
28-pin SOIC (derate 12.7mW/oC above +70oC).........1000mW 28-pin SSOP (derate 11.2mW/oC above +70oC)..........900mW 28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW 32-pin QFN (derate 29.4mW/oC above +70oC)...........2352mW
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 - C4 = 0.1F. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25C. PARAMETER DC CHARACTERISTICS Supply Current, AUTO ONLINE(R) Supply Current, Shutdown Supply Current AUTO ON-LINE(R) Disabled 1.0 10 A All RxIN open, ONLINE = GND, SHUTDOWN = VCC, VCC = 3.3V TAMB = 25oC, TxIN = GND or VCC MIN. TYP. MAX. UNITS CONDITIONS
ELECTRICAL CHARACTERISTICS
1.0 0.3
10 1.0
A mA
SHUTDOWN = GND, VCC = 3.3V, TAMB = 25oC, TxIN = Vcc or GND ONLINE = SHUTDOWN = Vcc, no load, VCC = 3.3V, TAMB = +25oC, TxIN = GND or VCC VCC = =3.3V or =5.0V, TxIN ONLINE, SHUTDOWN TxIN, ONLINE, SHUTDOWN, TAMB = +25oC, VIN = 0V to VCC Receivers disabled, VOUT = 0V to VCC IOUT = 1.6mA IOUT = -1.0mA All driver outputs loaded with 3K to GND, TAMB = +25oC
LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW HIGH Input Leakage Current Output Leakage Current Output Voltage LOW Output Voltage HIGH DRIVER OUTPUTS Output Voltage Swing +5.0 +5.4 V VCC -0.6 VCC -0.1 0.8 +0.01 +0.05 +1.0 +10 0.4 V V A A V V
2.4
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Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 - C4 = 0.1F. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25C. PARAMETER DRIVER OUTPUTS (continued) Output Resistance Output Short-Circuit Current Output Leakage Current RECEIVER INPUTS Input Voltage Range Input Threshold LOW Input Threshold LOW Input Threshold HIGH Input Threshold HIGH Input Hysteresis Input Resistance STATUS Output Voltage LOW STATUS Output Voltage HIGH Receiver Threshold to Drivers Enabled (tONLINE) Receiver Positive or Negative Threshold to STATUS HIGH (tSTSH) Receiver Positive or Negative Threshold to STATUS LOW (tSTSL) TIMING CHARACTERISTICS Maximum Data Rate (U) (H) (B) (-) 1000 460 250 120 Kbps VCC -0.6 350 0.2 30 3 -15 0.6 0.8 1.2 1.5 1.5 1.8 0.3 5 7 0.4 2.4 2.4 15 V V V V V V k V V s s s IOUT = 1.6mA IOUT = -1.0mA Figure 14 Figure 14 Figure 14 Vcc = 3.3V Vcc = 5.0V Vcc = 3.3V Vcc = 5.0V 300 +35 +60 +25 mA A MIN. TYP. MAX. UNITS CONDITIONS
ELECTRICAL CHARACTERISTICS
VCC = V+ = V- = 0V, VOUT=+2V VOUT = 0V VCC = 0V or 3.0V to 5.5V, VOUT = +12V, Drivers disabled
AUTO ON-LINE(R) CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC) 25C
RL = 3K, CL = 250pF, one driver active RL = 3K, CL = 1000pF, one driver active RL = 3K, CL = 1000pF, one driver active RL = 3K, CL = 1000pF, one driver active
Receiver Propagation Delay tPHL tPLH Receiver Output Enable Time Receiver Output Disable Time Driver Skew (E, EB) (EU) Receiver Skew Transition-Region Slew Rate (U) (EB)
0.15 0.15 200 200 100 50 50 90 500 100
s ns ns ns ns V/s
Receiver input to Receiver output, CL = 150pF Normal operation Normal operation | tPHL - tPLH | | tPHL - tPLH | Vcc = 3.3V, RL = 3k, TAMB = 25C, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V
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30
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers loaded with 3k, 0.1F charge pump capacitors, and TAMB = +25C.
200 150 Skew (ns) 100 50 0
T1 at 500Kbps T2 at 31.2Kbps All TX loaded 3K // CLoad
6 4
Transmitter Output Voltage (V)
2 0 -2 -4 -6 2.7 3 3.5 4 Supply V oltage (V) 4.5 5
1Driver at 1Mbps Other Drivers at 62.5Kbps All Drive rs Loaded with 3K // 250pF
0
250
500 1000 1500 Load Capacitance (pF)
2000
Figure 1. Transmitter Skew VS. Load Capacitance
Figure 2. Transmitter Output Voltage VS. Supply Voltage for the SP3243EU
6
Transmitter Output V oltage (V)
40
2Mbps 1.5Mbps
4 2 0 -2 -4 -6 0
35
Supply Current (mA)
1Mbps
30 25 20 15 10 5 0 0 1000
250Kbps
120Kbps 20Kbps
1 TX at full data rate 2 TX's at1/16 data rate
2Mbps
1.5Mbps
1Mbps
1 Transmi tter at full Data Rate 2 Transmi tters at 1 5.5 Kbps All Transmi tters loa des 3K + Load Cap
250
500 1000 1500 Load Capacitance (pF)
2000
2000
3000
4000
5000
Load Capacitance (pF)
Figure 3. Transmitter Output Voltage VS. Load Capacitance for the SP3243EU
Figure 4. Supply Current VS. Load Capacitance for the SP3243EU
25 20
Supply Current (mA)
6 4
Transmitter Output Voltage (V)
TxOUT +
15 10 5 0
2 0 -2 -4 -6 0
TxOUT -
1 Transmitter at 250Kbps 2 Transmitters at 15.6Kbps All drivers loaded with 3K // 1000pF
2.7
3
3.5
4
4.5
5
1000
2000
3000
4000
5000
Supply V oltage (V DC)
Load Capacitance (pF)
Figure 5. Supply Current VS. Supply Voltage for the SP3243EU
Figure 6. Transmitter Output Voltage VS. Load Capacitance for the SP3243EB
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
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Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers loaded with 3k, 0.1F charge pump capacitors, and TAMB = +25C.
TYPICAL PERFORMANCE CHARACTERISTICS
25 20 15 10 5 0 0
1 Transmitter at 250Kbps 2 Transmitter at 15.6Kbps All drivers loaded 3K + Load Cap - Slew + Slew
Slew Rate (V/s)
500
1000
2000
3000
4000
5000
Load Capacitance (pF)
Figure 7. Slew Rate VS. Load Capacitance
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
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PIN NUMBER NAME
C1+ V+ C1C2+ C2VR1IN R2IN R3IN R4IN R5IN R1OUT R2OUT R2OUT R3OUT R4OUT R5OUT STATUS T1IN T2IN T3IN
FUNCTION
Positive terminal of the voltage doubler charge-pump capacitor Regulated +5.5V output generated by the charge pump Negative terminal of the voltage doubler charge-pump capacitor Positive terminal of the inverting charge-pump capacitor Negative terminal of the inverting charge-pump capacitor Regulated -5.5V output generated by the charge pump RS-232 receiver input. RS-232 receiver input RS-232 receiver input RS-232 receiver input RS-232 receiver input TTL/CMOS receiver output TTL/CMOS receiver output Non-inverting receiver-2 output, active in shutdown TTL/CMOS receiver output TTL/CMOS receiver output TTL/CMOS receiver output TTL/CMOS Output indicating online and shutdown status TTL/CMOS driver input TTL/CMOS driver input TTL/CMOS driver input
SP3243E 28 27 24 1 2 3 4 5 6 7 8 19 18 20 17 16 15 21 14 13 12 23
SP3243EUCR QFN 28 26 22 29 31 32 2 3 4 5 6 17 16 18 15 14 13 19 12 11 10 21
ONLINE
Apply logic HIGH to override AUTO ON-LINE(R) circuitry keeping drivers acive (SHUTDOWN must also be logic HIGH, refer to Table 2) RS-232 driver output RS-232 driver output RS-232 driver output Ground +3.0V to +5.5V supply voltage Apply logic LOW to SHUTDOWN driver and charge pump. This overrides all AUTO ON-LINE(R) circuitry and ONLINE (Refer to table 2) No Connection
T1OUT T2OUT T3OUT GND VCC SHUTDOWN
9 10 11 25 26 22
7 8 9 23 25 20
NC
-
1,24,27,30
Table 1. Device Pin Description
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VCC C5 C1 + + 0.1 F 28 C1+ 0.1 F 24 C11 C2+ 0.1 F 2 C214 T1IN TTL/CMOS INPUTS 13 T2IN 12 T3IN 20 R2OUT 19 R1OUT 18 R2OUT TTL/CMOS OUTPUTS 17 R3OUT 16 R4OUT 15 R5OUT
VCC
26 VCC V+
27 C3 3 C4
+
0.1 F
C2
+
SP3243E
V-
+
0.1 F
T1OUT
9 RS-232 OUTPUTS
T2OUT 10 T3OUT 11
R1IN
4 5 6 7 8 RS-232 INPUTS
5k 5k 5k 5k 5k
R2IN R3IN R4IN R5IN
22 23
SHUTDOWN ONLINE
To P Supervisor Circuit
21 STATUS
GND 25
Figure 8. SP3243E Typical Operating Circuit
32
31
30
29
28
27
26
NC R1 IN R2 IN R3 IN R4 IN R5 IN T1OUT T2OUT
25
VC2NC C2+ C1+ NC V+ VCC
1 2 3 4 5 6 7 8
24 23 22 21 20 19 18 17
SP3243E
NC GND C1ONLINE SHUTDOWN STATUS R 2 OUT R1 OUT
10
11
12
13
14
15
Figure 9. SP3243E QFN Pinout Configuration
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
T3 OUT T3 IN T2 IN T1 IN R5OUT R4OUT R3OUT R 2OUT
16
9
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DESCRIPTION The SP3243E transceivers meet the EIA/TIA232 and ITU-T V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3243E devices feature Exar's proprietary and patented (U.S.-- 5,306,954) on-board charge pump circuitry that generates 5.5V RS-232 voltage levels from a single +3.0V to +5.5V power supply. The SP3243EU devices can operate at a data rate of 1000kbps fully loaded. The SP3243E is a 3-driver/5-receiver device, ideal for portable or hand-held applications. The SP3243E includes one complementary always-active receiver that can monitor an external device (such as a modem) in shutdown. This aids in protecting the UART or serial controller IC by preventing forward biasing of the protection diodes where VCC may be disconnected.
In many portable or hand-held applications, an RS-232 cable can be disconnected or a connected peripheral can be turned off. Under these conditions, the internal charge pump and the drivers will be shut down. Otherwise, the system automatically comes online. This feature allows design engineers to address power saving concerns without major design changes. THEORY OF OPERATION The SP3243E series is made up of four basic circuit blocks: 1. Drivers 2. Receivers 3. the Exar proprietary charge pump, and 4. AUTO ON-LINE(R) circuitry. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to 5.0V EIA/ TIA-232 levels with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. These drivers comply with the EIA-TIA-232-F and all previous RS-232 versions. Unused drivers inputs should be connected to GND or VCC. The drivers have a minimum data rate of 250kbps (EB) or 1000kbps (EU) fully loaded.
The SP3243E series is an ideal choice for power sensitive designs. The SP3243E devices feature AUTO ON-LINE(R) circuitry which reduces the power supply drain to a 1A supply current.
VCC C5 C1 + + 0.1 F 28 C1+ 0.1 F 24 C11 C2+ 0.1 F 2 C214 T1 IN 13 T2 IN 12 T3 IN 20 R2 OUT
T1 OUT
26 VCC V+
27 C3 3 C4 9
+
0.1 F
C2
+
SP3243E
V-
+
0.1 F
TxD RTS DTR
T2 OUT 10 T3 OUT 11
RS-232 OUTPUTS
UART or Serial C
RxD CTS DSR DCD RI
VCC
19 R1 OUT 18 R2 OUT 17 R3 OUT 16 R4OUT 15 R5OUT 22 23 21
SHUTDOWN ONLINE STATUS
R 1 IN 4
5K 5K 5K 5K 5K
R 2 IN R 3 IN R 4 IN R 5 IN
5 6 7 8 RS-232 INPUTS
GND 25
Figure 11 shows a loopback test circuit used to test the RS-232 Drivers. Figure 12 shows the test results where one driver was active at 1Mbps and all three drivers loaded with an RS-232 receiver in parallel with a 250pF capacitor. Figure 13 shows the test results of the loopback circuit with all drivers active at 250kbps with typical RS-232 loads in parallel with 1000pF capacitors. A superior RS-232 data transmission rate of 1Mbps makes the SP3243EU an ideal match for high speed LAN and personal computer peripheral applications.
RESET
P Supervisor IC
VIN
Figure 10. Interface Circuitry Controlled by Microprocessor Supervisory Circuit
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+3V to +5V
Device: SP3243E
SHUTDOWN
V+ C3 + 0.1 F
C5 C1
+ +
0.1 F C1+ 0.1 F C1C2+ 0.1 F C2T1IN
VCC
TxOUT High-Z Active
RxOUT High-Z Active
R2OUT Active Active
0 1
C2
+
SP3243
VC4
T1OUT TXOUT
+
0.1 F
TTL/CMOS INPUTS
TXIN
R1OUT TTL/CMOS OUTPUTS 5K RXOUT 5K
VCC
R1IN
Table 2. SHUTDOWN Truth Tables Note: In AUTO ON-LINE(R) Mode where ONLINE = GND and SHUTDOWN = VCC, the device will shut down if there is no activity present at the Receiver inputs.
RXIN
1000pF 1000pF
Receivers The receivers convert +5.0V EIA/TIA-232 levels to TTL or CMOS logic output levels. Receivers are High-Z when the AUTO ON-LINE(R) circuitry is enabled or when in shutdown. The truth table logic of the SP3243 driver and receiver outputs can be found in Table 2. The SP3243E includes an additional non-inverting receiver with an output R2OUT. R2OUT is an extra output that remains active and monitors activity while the other receiver outputs are forced into high impedance. This allows a Ring Indicator (RI) signal from a peripheral to be monitored without forward biasing the TTL/CMOS inputs of the other devices connected to the receiver outputs.
SHUTDOWN
ONLINE
To P Supervisor Circuit
STATUS
GND 18
Figure 11. Loopback Test Circuit for RS-232 Driver Data Transmission Rates
Figure 12. Loopback Test results at 1Mbps
Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, an internal 5K pulldown resistor to ground will commit the output of the receiver to a HIGH state.
Figure 13. Loopback Test results at 250Kbps
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Charge Pump The charge pump is a Exar-patented design (U.S. 5,306,954) and uses a unique approach compared to older less-efficient designs. The charge pump still requires four external capacitors, but uses a four-phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. This is important to maintain compliant RS-232 levels regardless of power supply fluctuations. The charge pump operates in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pump is enabled. If the output voltages exceed a magnitude of 5.5V, the charge pump is disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 -- VSS charge storage -- During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1- is transferred to C2-. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. Phase 2 -- VSS transfer -- Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C3. This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Phase 3 -- VDD charge storage -- The third phase of the clock is identical to the first phase -- the charge transferred in C1 produces -VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC.
Phase 4 -- VDD transfer -- The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. Since both V+ and V- are separately generated from VCC, in a no-load condition V+ and V- will be symmetrical. Older charge pump approaches that generate V- from V+ will show a decrease in the magnitude of V- compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at greater than 250kHz. The external capacitors can be as low as 0.1F with a 16V breakdown voltage rating.
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Minimum recommended charge pump capacitor value Input Voltage Vcc Charge pump capacitor value for SP32XX 3.0V to 3.6V C1 - C4 = 0.1F 4.5V to 5.5V C1 = 0.047F, C2 - C4 = 0.33F 3.0V to 5.5V C1 - C4 = 0.22F
The Exar-patented charge pumps are designed to operate reliably with a range of low cost capacitors. Either polarized or non polarized capacitors may be used. If polarized capacitors are used they should be oriented as shown in the Typical Operating Circuit. The V+ capacitor may be connected to either ground or Vcc (polarity reversed.) The charge pump operates with 0.1F capacitors for 3.3V operation. For other supply voltages, see the table for required capacitor values. Do not use values smaller than those listed. Increasing the capacitor values (e.g., by doubling in value)
reduces ripple on the transmitter outputs and may slightly reduce power consumption. C2, C3, and C4 can be increased without changing C1's value. For best charge pump efficiency locate the charge pump and bypass capacitors as close as possible to the IC. Surface mount capacitors are best for this purpose. Using capacitors with lower equivalent series resistance (ESR) and self-inductance, along with minimizing parasitic PCB trace inductance will optimize charge pump operation. Designers are also advised to consider that capacitor values may shift over time and operating temperature. AUTO ONLINE CIRCUITRY When the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5k resistors to ground. When this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standy mode. When ONLINE is HIGH, the AUTO ON-LINE(R) mode is disabled. The AUTO ON-LINE(R) circuit has two stages: 1) Inactive Detection 2) Accumulated Delay
The SP3243E devices have a patent pending AUTO ON-LINE(R) circuitry on board that saves power in applications such as laptop computers, palmtop (PDA) computers and other portable systems. The SP3243E devices incorporate an AUTO ON-LINE(R) circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. Conversely, the AUTO ON-LINE(R) circuit also disables most of the internal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1A. This function is externally controlled by the ONLINE pin. When this pin is tied to a logic LOW, the AUTO ON-LINE(R) function is active. Once active, the device is enabled until there is no activity on the receiver inputs. The receiver input typically sees at least +3V, which are generated from the transmitters at the other end of the cable with a +5V minimum.
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RECEIVER +2.7V 0V RS-232 INPUT VOLTAGES -2.7V VCC STATUS 0V
S H U T D O W N
tSTSL
tSTSH tONLINE
DRIVER RS-232 OUTPUT VOLTAGES
+5V 0V -5V
Figure 14. AUTO ON-LINE(R) Timing Waveforms
The first stage, shown in Figure 21, detects an inactive input. A logic HIGH is asserted on RXINACT if the cable is disconnected or the external transmitters are disabled. Otherwise, RXINACT will be at a logic LOW. This circuit is duplicated for each of the other receivers. The second stage of the AUTO ON-LINE(R) circuitry, shown in Figure 22, processes all the receiver's RXINACT signals with an accumulated delay that disables the device to a 1A supply current. The STATUS pin goes to a logic LOW when the cable is disconnected, the external transmitters are disabled, or the SHUTDOWN pin is invoked. The typical accumulated delay is around 20s. When the SP3243E drivers or internal charge pump are disabled, the supply current is reduced to 1A. This can commonly occur in hand-held or portable applications where the RS-232 cable is disconnected or the RS-232 drivers of the connected peripheral are turned off. The AUTO ON-LINE(R) mode can be disabled by the SHUTDOWN pin. If this pin is a logic LOW, the AUTO ON-LINE(R) function will not operate regardless of the logic state of the ONLINE pin. Table 3 summarizes the logic of the AUTO ONLINE(R) operating modes. The truth table logic of the SP3243E driver and receiver outputs can be found in Table 2.
The STATUS pin outputs a logic LOW signal if the device is shutdown. This pin goes to a logic HIGH when the external transmitters are enabled and the cable is connected. When the SP3243E devices are shut down, the charge pumps are turned off. V+ charge pump output decays to VCC, the V- output decays to GND. The decay time will depend on the size of capacitors used for the charge pump. Once in shutdown, the time required to exit the shut down state and have valid V+ and V- levels is typically 200s. For easy programming, the STATUS can be used to indicate DSR or a Ring Indicator signal. Tying ONLINE and SHUTDOWN together will bypass the AUTO ON-LINE(R) circuitry so this connection acts like a shutdown input pin.
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VCC = +5V
+5V C1
+ -
C2
+ -
+
C4
- +
VDD Storage Capacitor VSS Storage Capacitor
-
-5V
-5V
C3
Figure 15. Charge Pump -- Phase 1
VCC = +5V
C1
+ -
C2
+ -
+
C4
- +
VDD Storage Capacitor VSS Storage Capacitor
-
-5.5V
C3
Figure 16. Charge Pump -- Phase 2
VCC = +5V
+5V C1
+ -
C2
+ -
+
C4
- +
VDD Storage Capacitor VSS Storage Capacitor
-
-5V
-5V
C3
Figure 17. Charge Pump -- Phase 3
VCC = +5V
+5.5V
C1
+ -
C2
+ -
+
C4
- +
VDD Storage Capacitor VSS Storage Capacitor
-
C3
Figure 18. Charge Pump -- Phase 4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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6
Transmitter Output Voltage [V]
4 2 0 -2 -4 -6 Vout+ Vout-
The SP3243E driver outputs are able to maintain voltage under loading of up to 2.5mA per driver, ensuring sufficient output for mouse-driving applications.
0.869
0.939
0.62
1.02
1.12
1.23
1.38
1.57
1.82
2.67
3.46
4.93
8.6
0
0
VOUT +
Load Current Per Transmitter [mA]
1
VOUT -
Figure 19. SP3243E Driver Output Voltages vs. Load Current per Transmitter
VCC + + 26 VCC V+
C5 C1
0.1 F 28 C1+ 0.1 F 24 C11 C2+ 0.1 F 2 C214 T1IN 13 T2IN 12 T3IN 20 R2OUT 19 R1OUT 18 R2OUT 17 R3OUT 16 R4OUT 15 R5OUT
VCC
27 C3
+
0.1 F
C2
+
SP3243E
V- 3 C4
T1OUT
+
0.1 F
9
T2OUT 10 T3OUT 11
R1IN 4
5k 5k 5k 5k 5k
R2IN 5 R3IN
6
R4IN 7 R5IN
8
22 23
DB-9 Connector 6 7 8 9 1 2 3 4 5
SHUTDOWN ONLINE
To P Supervisor Circuit
21 STATUS
GND 25
DB-9 Connector Pins: 1. Received Line Signal Detector 2. Received Data 3. Transmitted Data 4. Data Terminal Ready 5. Signal Ground (Common)
6. 7. 8. 9.
DCE Ready Request to Send Clear to Send Ring Indicator
Figure 20. Circuit for the connectivity of the SP3243E with a DB-9 connector
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com SP3243E_100_072309
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RS-232 SIGNA L AT RECEIVER INPUT
SHUTDOWN INPUT
ONL INE INPUT
STATUS OUTPUT
TRA NSCEIVER STATUS Normal Operation
YES NO NO YES NO
HIGH HIGH HIGH LOW LOW
LOW HIGH LOW HIGH / LOW HIGH / LOW
HIGH LOW LOW HIGH LO W
(Auto-Online)
Normal Operation Shutdown (A u t o -On l i n e) Shutdown Shutdown
Table 3. AUTO ON-LINE(R) Logic
Inactive Detection Block
RXINACT
RXIN
RS-232 Receiver Block
RXOUT
Figure 21. Stage I of AUTO ON-LINE(R) Circuitry
Delay Stage
Delay Stage
Delay Stage
Delay Stage
Delay Stage
STATUS
R1INACT R2INACT R3INACT R4INACT R5INACT
SHUTDOWN
Figure 22. Stage II of AUTO ON-LINE(R) Circuitry
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com SP3243E_100_072309
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ESD TOLERANCE
The SP3243E series incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least +15kV without damage nor latch-up. There are different methods of ESD testing applied:
a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact
current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 24. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC.
The Human Body Model has been the generally accepted ESD testing method for semi-conductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body's potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 23. This method will test the IC's capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-42 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD
RC SW1
DC Power Source
RS SW2 CS
Device Under Test
Figure 23. ESD Test Circuit for Human Body Model
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com SP3243E_100_072309
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Contact-Discharge Model
RC SW1
DC Power Source
RS
RV SW2
CS
Device Under Test
R S and RV add up to 330 for IEC1000-4-2.
Figure 24. ESD Test Circuit for IEC1000-4-2
The circuit models in Figures 23 and 24 represent the typical ESD testing circuit used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5k an 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (RS) and the source capacitor (CS) are 330 an 150pF, respectively. The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point.
30A
15A
I
0A t = 0ns t = 30ns
t
Figure 25. ESD Test Waveform for IEC1000-4-2
DEVICE PIN TESTED
Driver Outputs Receiver Inputs
HUMAN BODY MODEL
+15kV +15kV
Air Discharge
+15kV +15kV
IEC1000-4-2 Direct Contact
+8kV +8kV
Level
4 4
Table 4. Transceiver ESD Tolerance Levels
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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PACKAGE: 28 PIN WSOIC
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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PACKAGE: 32 PIN QFN
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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PACKAGE: 28 PIN SSOP
e
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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PACKAGE: 28 PIN TSSOP
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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PRODUCT NOMENCLATURE
SP3243 E U EY L /TR
Tape and Reel options "L" suffix indicates Lead Free packaging A= SSOP Y= TSSOP T= WSOIC R= QFN Temperature Range C= Commercial Range 0c to 70C E= Extended Range -40c to 85C Speed Indicator Blank= 120Kbps B= 250Kbps H= 460kbps U= 1Mbps Package Type
Part Number
ESD Rating
E= 15kV HBM and IEC 1000-4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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ORDERING INFORMATION
Part Number SP3243ECA-L SP3243ECT-L SP3243ECY-L SP3243EEA-L SP3243EET-L SP3243EEY-L SP3243EBCA-L SP3243EBCT-L SP3243EBCY-L SP3243EBER-L SP3243EBEA-L SP3243EBET-L SP3243EBEY-L SP3243EBER-L SP3243EHCA-L SP3243EHCT-L SP3243EHEA-L SP3243EHET-L SP3243EUCA-L SP3243EUCT-L SP3243EUCY-L SP3243EUER-L SP3243EUEA-L SP3243EUET-L SP3243EUEY-L SP3243EUER-L Data Rate (kbps) 120 120 120 120 120 120 250 250 250 250 250 250 250 250 460 460 460 460 1000 1000 1000 1000 1000 1000 1000 1000 Temp. Range 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 32 Pin QFN 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 32 Pin QFN 28 Pin SSOP 28 Pin WSOIC 28 Pin SSOP 28 Pin WSOIC 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 32 Pin QFN 28 Pin SSOP 28 Pin WSOIC 28 Pin TSSOP 32 Pin QFN
For Tape and Reel option add "/TR", Example: SP3243ECA-L/TR.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com
SP3243E_100_072309
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REVISION HISTORY
DATE 02/05/06 07/23/09 REVISION DESCRIPTION -1.0.0 Legacy Sipex Datasheet Convert to Exar Format, Update ordering information and change revision to 1.0.0.
Notice EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2009 EXAR Corporation Datasheet July 2009 Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Exar Corporation 48720 Kato Road, Fremont CA, 94538 * 510-668-7017 * www.exar.com SP3243E_100_072309
24

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